Von Neumann Architecture

The components in a CPU, in a computer that has a Von Neumann architecture

John Von Neumann developed the concept of the stored program computer in the 1940s
The Von Neumann computer architecture which most modern day computers use, is based upon this concept
- The key feature of the stored program concept, and Von Neumann architecture, is data and instructions are stored in the same memory ( RAM ) as binary
- Another feature of Von Neumann architecture is a central processing unit (CPU) fetches instructions from memory and executes them one at a time (serially)
- The CPU then stores the results back into memory

Components of the Central Processing Unit

A diagram showing the main components of the CPU

The main purpose of the CPU is to execute instructions and process data
The CPU has two main components - the Control Unit (CU) and the Arithmetic Logic Unit ALU)
- The Control Unit controls the flow of data around the CPU
- The Control Unit also sends control signals to the different components instructing them what to do e.g. read, write, add, subtract
- The Control Unit decodes instructions (into an opcode and operand )
- The Control Unit controls the timings of operations (the clock speed)
- The Arithmetic Logic Unit(ALU) performs the calculations required to execute the instructions, these include ADD and SUBTRACT
- The ALU also carries out logical operations such as COMPARE
- The ALU has a built-in register where it stores interim results of calculations
- After calculations, the ALU sends data to the MDR
The CPU also contains a number of registers which are small memory locations within the CPU, which temporarily store data needed to execute an instruction
Special purpose registers have specific roles to play in the execution of an instruction

Special purpose register	Definition
Program Counter (PC)	stores the address of the next instruction to be fetched from memory
Memory Address Registers (MAR)	stores the address of the instruction or data to be fetched from or written to memory
Memory Data Register (MDR)	stores the data that has been fetched from memory or being written to memory Data from MDR is sent to ALU to be executed
Current Instruction Register (CIR)	stores the instruction the CPU is currently decoding or executing
Accumulator	Temporarily stores the results of the calculations performed by the arithmetic and logic unit

Exam Tip

If asked to describe the purpose of the PC, the MAR or the MDR make sure you explain how the data is being fetched or written to memory.

Worked example

What are the characteristics of Von Neumann architecture?

[2]

Any 2 from:

Both data and instructions are stored in the same memory unit [1]
Single Arithmetic and Logic Unit [1]
Single Control Unit [1]
Uses the FDE cycle to execute instructions serially [1]

Buses

Components within the CPU and wider computer system are connected by buses. These are wires down which electronic signals and data travel. The different buses are collectively called the system bus
The system bus is made up of three different buses - the data bus, the control bus and the address bus
- The data bus transmits data from the CPU to memory or input/output controllers. It is bidirectional which means data can travel in both directions
- The address bus transfers addresses from the CPU to memory. It is unidirectional which mean addresses only go from the CPU to memory
- The control bus transfers control signals from the control unit to other components in the computer system such as memory or input/output controllers. The control bus is bidirectional

A diagram showing how the different buses connect the components in a computer system

Worked example

Which bus is unidirectional?

[1]

A		Address bus
B		Data bus
C		Control bus
D		System bus

A [1]

The Fetch, Decode, Execute cycle

The Central Processing Unit (CPU) executes instructions by performing the Fetch Decode Execute cycle
- The CPU fetches an instruction from memory
- The instruction is then decoded ( by the Control Unit) into an opcode and an operand
- The instruction is executed and the whole cycle is repeated with the next instruction in the process

3-1-computer-architecture--von-neumann-architecture-2

A diagram depicting the Fetch Decode Execute cycle

Step

Detailed Explanation

Fetch

The memory address of the instruction to be fetched is stored in the Memory Address Register and is sent down the address bus.
The data/instruction at the memory address is transferred back to the CPU, via the data bus, where it is stored in the Memory Data Register
The instruction is copied into the Current Instruction Register and the Program Counter increments

Decode

The instruction in the Current Instruction Register is decoded, by the Control unit , into an opcode and an operand

Execute

The instruction is executed by the Arithmetic Logic Unit and the opcode is performed upon the operand.
The result is stored in the accumulator or written to a memory location within memory

Worked example

Explain how an instruction is fetched using Von Neumann architecture

[6]

The Program Counter (PC) holds address/location of the next instruction to be fetched [1]
The address held in PC is sent to Memory Address Register (MAR) [1]
The memory address is sent using address bus [1]
The Program Counter is incremented [1]
The instruction is sent from the address in memory to the Memory Data Register (MDR) [1]
The instruction is transferred using the data bus [1]
The instruction is sent to Current Instruction register (CIR) [1]

Exam Tip

Make sure you read the question carefully and look at the numbers of marks allocated to judge the level of detail required. Often questions on the fetch-decode-execute cycle only require you to describe the steps rather than explain how the registers and buses are used during each step (as shown in the table above)

Von Neumann Architecture (CIE IGCSE Computer Science)

Revision Note